The present invention relates to semiconductor devices and, more particularly, to semiconductor devices including line patterns.
Conductive line patterns of a semiconductor device may be used to transfer, supply, or output an electrical signal. The line patterns may be electrically connected to discrete circuit elements of the semiconductor device, and an electrical input signal may be supplied to the discrete circuit elements through the line patterns and/or electrical information generated from the discrete elements may be output through the line patterns. Further, the respective line patterns may electrically interconnect the discrete elements which are separated from each other, thereby enabling electrical communication between the discrete elements. Exemplary discrete circuit elements can include metal-oxide-semiconductor (MOS) transistors, capacitors, diodes, and/or resistors.
In some cases, the line patterns may be formed to have the same width and the same distance therebetween. In addition, the line patterns may be partially cut/delineated to provide certain design characteristics of the semiconductor device.
FIG. 1 is a plan view illustrating conventional line patterns of a semiconductor device.
Referring to FIG. 1, a plurality of line patterns 10 are formed on a substrate. The line patterns 10 may be formed so as to extend parallel with one another along a first direction. The line patterns 10 may also be formed to have the same distance therebetween (i.e., spaced apart by the same distance) in a second direction that is perpendicular to the first direction. The line patterns 10 may be subdivided along the first direction into separate portions 12 by cutting regions 15 extending in the second direction through the line patterns 10. Accordingly, the first direction may correspond to rows and the second direction may correspond to columns.
The separated portions 12 and the cutting regions 15 may be defined using a single photolithography process. For example, the separated portions 12 and the cutting regions 15 may be defined by coating a photoresist layer on a conductive layer deposited on a substrate, exposing the photoresist layer using a photo mask, and developing the exposed photoresist layer to form photoresist patterns. Subsequently, the conductive layer is etched using the photoresist patterns as etch masks. As a result, the line patterns 10 including the cutting regions 15 are formed on the substrate.
As shown in FIG. 1, the cutting regions 15 are aligned relative to each other along a straight line that crosses the line patterns 10. When exposing the cutting regions 15 to light during an exposure step of a photolithography process, interference in the light pattern may result along the adjacent cutting regions 15. As a result, some portions of photoresist patterns that are adjacent to the cutting regions 15 may be deformed so as to have undesirable shapes. For example, a notching phenomenon may occur on the separated portions 12 adjacent to the cutting regions 15 when a relatively high level of energy is used during the exposure step of the photolithography process. In such example, the widths of the photoresist patterns adjacent to the cutting regions 15 may be reduced and, correspondingly, may result in increased areas of the cutting regions 15. Alternatively, some residues of the photoresist layer may remain between the photoresist patterns when the exposure energy of the photolithography process is low. Bridges may thereby be formed that cause electrical shorts between adjacent line patterns 10.